Digital Logics 2nd semester Syllabus of Diploma in Computer Engineering

Digital Logics 2nd semester Syllabus of Diploma in Computer Engineering : 

Digital logic Syllabus of Second semester CTEVT Diploma, 2nd semester Digital logic syllabus.

Hello Namaskar Everyone, Today i will tell you about the Digital Logic subject which belongs to the second semester first years CTEVT Diploma course in Nepal. We will see the details about this subject in this articles so I request you to stay with us. It will help you in exam. And some of the topic are as follow : 

1. Digital Logic second Semester Subject 

2. Digital Logic Second Semester Syllabus 

3. Digital Logic Second Semester reference Books

4. Digital Logic Second Semester Practical 

Digital Logic second Semester Subject : 

This subject is mainly available in first year second semester. This is the new subject and related to circuit field. In exam the full marks of this subject is Eighty(80) and pass marks is Thirty two(32). And It is also a hard subject because most of the student fails in this subject.

Digital Logic Second Semester Syllabus :

Unit 1 : Introduction [2 Hours]

1.1 Analog Signal and Digital Signal

1.2 Digital logic and operation

1.3 Clock wave form, positive logic, negative

logic

1.4 Propagation delay , Noise Margin

Unit 2: Number Systems and Codes [6 Hours]

2.1Decimal Number System

2.2 Binary Number System

2.3 Octal Number System

2.4 Hexadecimal Number System

2.5 Conversions among Different Number Systems

2.5.1 Decimal to Binary, Octal and Hexadecimal

2.5.2 Binary to Decimal, Octal and Hexadecimal

2.6 Fraction Conversions from

2.6.1 Decimal to Binary , Octal and Hexadecimal

2.6.2 Binary to Decimal, Octal and Hexadecimal

2.7 BCD Code and conversion from Binary

2.8 Gray Code and conversion from Binary

2.9 Alphanumeric Code

     -ASCII Code

     -EBCDIC Code

Unit 3 : Arithmetic Logic Operations [3 Hours]

3.1 Binary Arithmetic

     -Binary Addition

     -Binary Subtraction

3.2 9’s and 10’s Complement Method

     -9’s Complement Subtraction

     -10’s Complement Subtraction

3.3 1’s Complement and 2’s Complement Method

     -1’s Complement Subtraction

     -2’s Complement Subtraction

Unit 4: Logic Gates [6 Hours]

4.1 Basic Gates: AND, OR, NOT

4.1.1 Logic Equations

4.1.2Truth Table and symbol

4.2 De Morgan’s Theorems

4.2.1 Verification of De Morgan’s Theorem by truth Table

4.3 Universal Gates: NAND, NOR

4.3.1 Logic Equations

4.3.2 Truth Table and symbol

4.3.3 Verification of Universal properties of NAND and NOR gates

4.4 Exclusive Gates: XOR, XNOR

4.5 Building Logic Circuits from Logic Equations

Unit 5: Boolean Functions and Logic Simplification [6 Hours]

5.1 Boolean Algebra and its Properties/Laws

5.2 Simplification of Boolean Equations

5.3 Sum of Product (SOP) Simplification

5.4 Product of Sums (POS) Simplification

5.5 Karnaugh Map

5.5.1 K-Map Simplification for Two Input Variables

5.5.2 K-Map Simplification for Three Input Variables

5.5.3 K-Map Simplification for Four Input Variables

5.5.4 Maps with Don’t Care Conditions

Unit 6 : Combinational Logic Circuits [9 Hours]

6.1 Adders

6.1.1 Half Adder

6.1.2 Full Adder

6.1.3 Parallel Bit Adders (3 Bits and 4 Bits)

6.2 Subtractors

6.2.1 Half Subtractors

6.2.2 Full Subtractors

6.2.3 Parallel Bit Subtractors (3 Bits and 4 Bits)

6.3 Encoders

6.3.1 Decimal to Binary Encoder

6.3.2 Decimal to BCD Encoder

6.3.3 Encoder IC Packages

6.4 Decoders

6.4.1 Binary to Decimal Decoder

6.4.2 BCD to Decimal Decoder

6.4.3 Seven Segment Display Decoder

6.4.4 Decoder IC Packages

6.5 Multiplexers

6.5.1 4-to-1 Multiplexer

6.5.2 8-to-1 Multiplexer

6.5.3 Multiplexer Tree

6.5.4 Multiplexer IC Packages

6.6 De multiplexers

6.6.1 De multiplexer and Decoder Relations

6.6.2 1-to-4 De multiplexer

6.6.3 1-to- 16 De multiplexer

6.6.4 De multiplexer tree and De multiplexer

in IC Packages

Unit 7 : Sequential Logic Circuits [10 Hours]

7.1 Latch and Flip-Flops

7.1.1 RS Flip-Flop : its symbol and Truth Table

7.1.2 Construction of RS flip-flops using NAND and NOR gates

7.1.3 Application of Clock and set and preset inputs

7.1.4 D Flip-Flop : its symbol and Truth Table

7.1.5 JK Flip-Flop: its symbol and Truth Table

7.1.6 T Flip-Flop: its symbol and Truth Table

7.1.7 JK Master-Slave Flip-Flops: its symbol and Truth Table

7.1.8 Applications of Flip-Flops

7.2 Shift-Registers

7.2.1 Flip-flop as a One-bit Memory Device

7.2.2 Right/Left Shift Registers

7.2.3 Serial-in Serial-out (SISO) Shift Register ( 4 bits and timing diagram)

7.2.4 Serial-in Parallel-out (SIPO)Shift Register

7.2.5 Parallel-in Serial-out (PISO)Shift Register

7.2.6 Parallel-in Parallel-out (PIPO)Shift Register

7.2.7 Applications of Shift Registers

7.3 Counters

7.3.1 Asynchronous Counters

7.3.2 Ripple Counters and timing diagram

7.3.3 Decade Counters and timing diagram

7.3.4 Ring Counters

7.3.5 Synchronous counter, Mod4,Mod 8 and Mod 10

7.3.6 Applications of Counters

Unit 8 : Digital Displays [3 Hours]

8.1 LED Display

8.2 LCD Display

8.3 7-Segment Display

8.4 Alphanumerical Display

8.5 Digital Clock Display Design

Digital Logic Second Semester Practical : 

1. Verify the universal properties of the NAND gate and NOR gate.

2. Experiments on logic operation and verify with truth tables of basic gates: XOR, XNOR Gates

3. Build logic circuits from logic equations

4. Realize the pulse operation in different logic gates

5. Realize and verify truth tables applying De Morgan’s Theorems

6. Realize and verify truth tables of binary half adder/Subtractor and full adder/Subtractor

7. Realize the function of decimal to 3-4 bit binary binary encoder

8. Realize the function of 4 bit binary binary decoder

9. Realize the function of 4-to-1 multiplexer and 1-to-4 de multiplexer circuits.

10. Realize the function of latches and flip-flops, RS,D,JK,T flip-flops

11. Realize the function shift-registers: SISO,SIPO,PISO and PIPO

12. Realize the function ripple counters

13. Realizing the function synchronous counters

14. Realizing and designing of seven-segment display-decoder logic circuit

Digital Logic Second Semester reference Books :

 1. Malvino, A. P. (2011). Digital computer electronics. New Delhi: Tata Mcgraw Hill Education Pvt. Ltd.

 2. Floyd, T. L. (2015). Digital fundamentals (Eleventh edition). Boston: Pearson.

 3. Mano, M. M., Kime, C. R., & Martin, T. (2016). Logic and computer design fundamentals (Fifth Edition). Boston: Pearson.

 4. Rafiquzzaman, M. (2005). Fundamentals of digital logic and microcomputer design (5th ed). Hoboken, N.J: J. Wiley & Sons.

 5. Mano, M. M. (2002). Digital design (3rd ed). Upper Saddle River, NJ: Prentice-Hall